The transmission of signals indicative of data (e.g., signals indicative of video or audio data) to a receiver over a link degrades the data, for example by introducing time delay error (sometimes referred to as jitter) to the data. In effect, the link applies a filter (sometimes referred to as a “cable filter”) to the signals during propagation over the link. The cable filter can cause inter-symbol interference (ISI).
Equalization is the application of an inverted version of a cable filter to signals received after propagation over a link. The function of an equalization filter (sometimes referred to as an “equalizer”) in a receiver is to compensate for, and preferably cancel, the cable filter. Equalization at the receiver side of a link is typically needed in order to achieve reliable data recovery when the data rate is high (greater than or equal to 1 Gb/s).
A typical conventional equalizer used in a receiver employs both an adjustable high pass filter (HPF) and an adjustable low pass filter (LPF). The HPF and LPF can be adjusted to vary pole and zero locations and gain parameters thereof, in order to minimize signal degradation in the equalized signal (i.e., to achieve the best data “eye”), and the equalized signal can then be sampled to recover the transmitted data.
When a receiver including such a conventional equalizer is implemented using CMOS technology, adjustment of the equalizer is impractical when the data rate exceeds 1 Gb/s (1 Gigabit per second) because the transconductance (gm) for the CMOS transistor circuitry is relatively small and any additional switch or passive element in the equalizer would have a large adverse effect on equalizer performance. Thus most conventional equalizers are implemented using Bipolar or Bipolar/CMOS (BiCMOS) technology which is more costly than CMOS technology. See for example, the paper by M. H. Shakiba, entitled “A 2.5 Gb/s Adaptive Cable Equalizer,” 1999 IEEE International Solid-State Circuits Conference, Paper WP 23.3, pages 396-397 and 4483.
Several proposals have been made for implementing equalizers using CMOS technology, such as those described in U.S. Pat. No. 6,169,764, issued Jan. 2, 2001, to Babanezhad. U.S. Pat. No. 6,169,764 suggests implementing an equalizer as a high pass filter using “transconductance-capacitor (or gm-C) techniques,” or as a high-pass, continuous time (RMC) filter comprising differentiators that are made up of a variable resistor along with an operational amplifier and its differentiating capacitor. However, the high-pass, continuous time filters described in U.S. Pat. No. 6,169,764 are limited to applications in which the data rate does not exceed several hundred Megabits per second due to inherent limitations in both the CMOS technology and the circuit concept employed therein.